The invention relates to a system and a method for testing an integrated circuit.
Modern microcontrollers, in particular “Systems on a Chip” (SoC), include at least one memory area and at least one Central Processing Unit (CPU) with a processor on a chip. In the memory area, a complex software program executed by the processor and further data may be stored, which the processor accesses during processing.
During the development of the software program and of the chip itself, and of the function blocks surrounding the chip, the chip and the software program have to be tested. To this end, it is necessary that the software program runs through the situations to be tested so as to cause and observe the reaction of the software program or of the chip, respectively.
The situations to be tested may, however, not be caused with reasonable effort in that the program stored in the chip and the parameter data are changed frequently and the normal progress of the software program is executed up to the relevant place in the instruction sequence of the program.
Furthermore, system parameters, for instance, constants for actuators that are controlled by the SoC, have to be optimized. This calibrating requires the repeated running through of an instruction sequence with parameters, wherein these are optimized between the cycles.
Thus, there is the need to repeatedly bring the software program executed on the SoC in a particular situation, so that a particular program section and thus a desired instruction sequence is run through. In so doing, it must be possible to vary parameters that are processed by the software program and influence the program flow, so that a particular situation can be run through with different parameter values.
From prior art, possibilities for performing such a calibration are known.
DE 102 37 173 discloses a method for collecting temporary measurements in a programmed control device, wherein the control device includes a microcontroller—and thus a processor, and a memory. The memory includes, on the one hand, a volatile memory area whose content is lost without power supply, and which is, for instance, a RAM in which predominantly the variable parameters are stored. On the other hand, the memory includes a non-volatile memory area in which the program to be executed is stored. By an address register, a section of the RAM memory area can be indicated as Calibration RAM (CALRAM), so that the processor accesses the CALRAM instead of the memory areas that are specifically stored in the program flow. Via an emulator sensing head, the memory areas defined as CALRAM can be accessed in reading and writing, so that the desired data and instruction sequences can be written in these memory areas and are subsequently processed by the processor. Via the emulator sensing head, the content of the CALRAM and thus the content of the parameters can be read.
This solution, however, has the disadvantage that an emulator sensing head has to be used.
WO 03/102961 describes another method by which the instructions and data to be processed by the processor of a SoC can be manipulated via an interface from outside. The SoC or the method, respectively, serve the calibration of an SoC with a volatile memory area, for instance, a RAM, and a non-volatile memory area, for instance, a flash EEPROM, and a processor. The software program to be executed and the data are stored in the flash EEPROM in the normal state of the SoC. In the normal state, the processor accesses the flash EEPROM to read and process the software program and the data. For calibration of the data, the SoC can be accessed via an interface from outside such that the SoC passes into a calibration mode. In this mode, the data to be calibrated are copied into the volatile memory area. The volatile memory area is assigned the address of that non-volatile memory area in which the data to be calibrated have been stored so far, so that the processor, when accessing the data to be calibrated, will henceforth access the volatile instead of the non-volatile memory area. Via the interface, a user may input instructions and data for processing by the processor and thus calibrate the parameters. Subsequently, the modified data are written back from the volatile memory area in the non-volatile memory area, so that they are permanently stored.
This method and the pertinent SoC, respectively, has the disadvantage that an instruction sequence for the calibration mode and for writing the data from the non-volatile memory in the volatile memory and back has to be provided in the software program. To be able to store this instruction sequence in the non-volatile memory, it has to be designed correspondingly larger.
In a further known solution, the microcontroller includes, for storing the program to be executed in normal operation, exclusively a volatile memory that is adapted to be written with modified data for testing and calibrating the microcontroller. Here it is of disadvantage that this memory permanently has to be supplied with voltage. Since usually only the memory, but not the entire microcontroller has to be supplied with voltage, considerable effort is practiced to limit the memory as the area of permanent voltage supply on the microcontroller.
For these and other reasons, there is a need for the present invention.